Science
NASA and Microchip Technology begin testing high-performance space processor
The radiation-hardened system-on-chip is designed to significantly boost onboard processing power and enable advanced autonomy for future space missions.
The short version
- NASA has begun testing its new High Performance Spaceflight Computing (HPSC) processor at the Jet Propulsion Laboratory in Southern California.
- Developed in partnership with Microchip Technology, the radiation-hardened 64-bit multi-core system-on-chip is built to deliver over a hundredfold increase in performance per watt compared to existing space-qualified systems.
- The architecture supports AI workloads, fault tolerance, high-speed networking, and virtualization to enable autonomous navigation and local data filtering for deep-space missions.
- The system uses open-source software and commercial operating systems as part of a broader spaceflight computing ecosystem.
Key facts
- NASA announced its High Performance Spaceflight Computing project and entered a testing phase at the Jet Propulsion Laboratory in May 2026.[Hacker News]
- The Microchip PIC64-HPSC processor is a radiation-hardened 64-bit multi-core system-on-chip designed for fault tolerance, security, and AI workloads.[Hacker News]
- NASA projects the HPSC system will yield more than a hundredfold improvement in performance per watt compared to current space-qualified computing platforms.[Hacker News]
- The chip incorporates an integrated 240-gigabit-per-second TSN Ethernet switch alongside support for PCIe, CXL, and high-speed networking.[Hacker News]
- Software support for the platform includes open-source tools like Linux, LLVM, and TensorFlow Lite, as well as commercial solutions from providers such as Wind River.[Hacker News]
What remains uncertain
- The timeline for deploying the HPSC processor on operational flight missions has not been specified.[Hacker News]
Sources
- Why HPSC Is a Big Deal for Space ExplorationHacker News